The Voyager Computer Command System is an [[ISA|instruction set architecture]] developed by [[NASA]] at [[JPL]] in the early [[1970s]] based on the primary computer used for the Viking Orbiters. > The Computer Command Subsystem (CCS) is responsible for sequencing and controlling functions. The CCS contains fixed routines such as command decoding and fault protection routines, HGA Pointing information (HPOINT), and spacecraft sequencing information. \- Matsumoto, "*Challenges of Flying a Very Old Spacecraft on a Very Long Mission*"[^8] p2 (2016) >[!INFO] > This note was originally written on [[2024-03-14]] and has been updated and expanded dozens of times since then, most recently on [[2025-09-20]]. Due to the similarity between the Viking Orbiter and Voyager probe CCS, the Viking documentation will be extensively used as a source, and much of what is written here applies to all [[#History|four]] craft. # Notability > The computer system that has been in continual operation for the longest period is the Computer Command System (CCS) onboard NASA's Voyager 2 spacecraft. This pair of interlinked computers have been in operation since the spacecraft's launch on 20 August 1977. \- Guinness World Records page[^1] for Voyager 2's CCS ## Implementations - Viking 1 Orbiter (precursor) - Viking 2 Orbiter (precursor) - Voyager 1 Probe `VGR 77-3` - Voyager 2 Probe `VGR 77-1` - Voyager Test Probe `VGR 77-2` (failed validation, never launched) See [[#History#Three-In-One|Voyager's History]] for more detail. ### Software - CCS Programming System (software simulation for testing used during development of the Viking program) - HSSIM ("High-Speed SIMulator", software simulation used later by NASA)[^13] # Hardware > The CCS consists of two complete computers, with two processor units (each made using discrete components rather than a single microprocessor), two output units, and two power supplies. \- Guinness World Records page[^1] for Voyager's CCS The CCS processors were not monolithic integrated circuits but discrete component designs based TTL logic chips. I've seen claims that these were specifically Texas Instruments 7400 TTL logic chips, but I haven't found any first party evidence of this. # CCS Architecture The machine operates on 18-bit words, but similar to [[RISC]] it has fixed width instructions and cannot support full-width immediate values. While the multiple addressing modes and special purpose registers are more characteristic of [[CISC]] architecture. ## Complexity > JPL considered several designs for the Viking computer, finally settling on the eventual Command Computer because of its simplicity. It had the least number of parts and was similar to prior systems in concept. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p156 (1988) Instructions are 18 bits wide. 12 of those bits are used for addressing and the remaining 6 are used to specify the operation. This means the system only supports 64 ($2^6$) operations in total. It is fundamentally very simple and low complexity, yet robust and reliable. ## Registers The CCS contains only 8 registers[^6]. | Register | Bits | Info | | ----------------------- | ---- | ------------------------------------------------------------------------------------------------------------------------------------------------------------------- | | Accumulator | 18 | Source operand and destination for arithmetic and logical operations.<br><br>Also used as a single-word buffer for data transmission during I/O operations. | | Program Counter | 12 | Address of the instruction to be fetched from memory. | | Link | 12 | Subroutine return address.<br><br>Program Counter loaded into Link during jump operations. | | Condition Code | 4 | Set by also arithmetic and logical instructions aside from address incrementing operations.<br><br>Contains the Overflow, Minus, Odd Parity, and Nonzero flags.[^4] | | Memory Address | 12 | Holds address to the memory being accessed.<br><br>> The most significant two bits were used to determine access checking as determined by jumper wires. | | Interrupt / Mask / Dump | 6 | Used to determine the highest priority interrupt awaiting processing of the 32 (2x16) interrupts possible. | | Memory Data | 18 | Holds a memory data word (18-bits) which is the value written to memory during store operations. | | Instruction | 8 | Holds the 6 [[#Instructions\|opcode]] bits plus 2 control bits. | Only 12 bits are needed to address the entire [[#Memory]] address space. ### Discrepancy in the Number of Registers In "*Computers in Spaceflight*", Tomayko says that there are **13** registers and cites a document called "*Functional Requirement Viking Orbiter 1975 Flight Equipment Computer Command Subsystem Hardware*" (`V075-4-2005-2A` Jan 17, 1975) by H. Milton Holt. This document is unfortunately [[#Resources#Unavailable Documents (Viking)|not publicly available]]. Despite providing this higher number of registers, Tomayko does not mention any registers not covered in "*Viking Spacecraft: Orbiter Design*" from 1980. There are mentions of an ACE (Attitude Control Electronics) register and an external shift register in the Viking Orbiter design documentation, it is possible that Tomayko was counting these and other external data registers as part of the Viking CCS's complement of registers. This may simply be a mistake, but until I can get a copy of the original documentation I can't say for sure. ## Interrupts > The actual hardware implementation was organized as four groups of eight interrupts. Functionally, however, the interrupts were considered as two groups of sixteen interrupts. \- Holmberg, Faust, Holt, "*Viking Spacecraft: Orbiter Design*"[^6] p160 (1980) These are the interrupts as specified for the Viking Orbiter. A few of these were likely set up different for the Voyager spacecraft. The Voyager design does still have a DTR system, but had a completely different flight system with a larger (14-bit) communication channel than Viking's FDS. | \# | Interrupt | Internal | Info | | --- | --------------------------------------------- | -------- | ---- | | 1 | Internal Error | Yes | | | 2 | Accelerometer Pulses | | | | 3 | 100 PPS | Yes | | | 4 | Tape index increment DTR A | | | | 5 | Tape index decrement DTR A | | | | 6 | Tape index increment DTR B | | | | 7 | Tape index decrement DTR B | | | | 8 | 1 PPS | Yes | | | 9 | External level 1 | Yes | | | 10 | Zero reached by interrupts 2-8 | Yes | | | 11 | FDS low-rate frame start | | | | 12 | FDS low-rate bit sync | | | | 13 | OU 1 TM available | | | | 14 | OU 2 TM available | | | | 15 | Command initiate - change in lock (primary) | | | | 16 | Command sync - bit timing (primary) | | | | 17 | Command error (secondary) | Yes | | | 18 | Command initiate - change in lock (secondary) | | | | 19 | Command sync - bit timing (secondary) | | | | 20 | Reject | Yes | | | 21 | Demand read | Yes | | | 22 | Initiate read | Yes | | | 23 | Output unit available | Yes | | | 24 | VIS A frame start | | | | 25 | VIS B frame start | | | | 26 | 1 PPH | Yes | | | 27 | External level 2 | Yes | | | 28 | External level 3 | Yes | | | 29 | External level 4 | Yes | | | 30 | External level 5 | Yes | | | 31 | BOT/EOT DTR A | | | | 32 | BOT/EOT DTR A | | | ### Abbreviations Used in Interrupt Table Also used elsewhere, but are particularly opaque with so little context in the interrupt table. | ABRV | Meaning | Info | | ----- | ------------------------ | ----------------------------------------------------------------------------------------------------------------------------------------------------- | | `BOT` | Beginning of Tape | | | `EOT` | End of Tape | | | `FDS` | Flight Data Subsystem | | | `DTR` | Digital Tape Recorder | | | `OU` | Output Unit | | | `PPH` | Pulses Per Hour | Once an hour, this interrupt will be fired. | | `PPS` | Pulses Per Second | PPS is equivalent to Hertz for low-duty-cycle operation. In this case it means that an interrupt is fired every 1/10th of a second and once a second. | | `TM` | Telemetry | | | `VIS` | Visual Imaging Subsystem | | ## Memory Each CCS (and each AACS FCP) has its own dedicated 4096 18-bit words of addressable memory, broken into four equal regions. Each region is configurable as read/write, read-only, or protected. Writing to protected memory requires executing a special instruction first,[^6] making it a kind of [[EEPROM]]. This prevents a misbehaving program from accidentally trashing mission-critical memory regions. The physical construction[^29] used the plated-wire memory technique which could be machine-assembled unlike the earlier magnetic-core memory which was typically assembled by hand. ### Memory Layout For the CCS, the lower half of the memory (addresses `0`-`2048`) is configured as write-protected, and the rest read-write.[^6] The critical fault-recovery, core programming, and reserved areas ate up around 1600 words[^31] at launch and in the decade thereafter - presumably using up most of this memory protected region. While it is *technically* possible to directly control[^31] the craft live from the ground - there's around 2 full days of round-trip latency! So the remaining memory space (~2,500 words) is primarily used for sequencing[^31] - stored commands that trigger over time according to a flight or mission plan. ## Instructions > The processor instruction repertoire consisted of 64 instructions. There were 16 immediate instructions, 28 direct instructions, 16 indirect instructions, 2 I/O instructions, and the execute and wait instruction. \- Holmberg, Faust, Holt, "*Viking Spacecraft: Orbiter Design*"[^6] p162 (1980) >[!TODO] > There is some doubt about Tomayko's explanations here. Needs a better, more technical source. > The 64 instructions were mostly common to other computers, but there was no multiply or divide. There were two sets of loads, stores, increments, and subroutine calls: one used during independent operation and one aimed at dual operation, so that the two memories could be kept equivalent. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p168 (1988) >[!WARNING] > The instruction list is a reconstruction based on various mentions of different instructions as I have as of yet not found a full listing anywhere. | Instruction | Meaning | | ----------- | ----------------------------------------------- | | WAIT | Wait until interrupt? | | EXECUTE | Execute instruction stored at memory address? | | LOAD | Load memory | | RLOAD | Tandem load memory with redundant system | | STORE | Store memory | | RSTORE | Tandem store memory with redundant system | | INC | Increment Accumulator register | | RINC | Tandem increment accumulator register | | SUB | Jump to subroutine | | RSUB | Tandem jump to subroutine with redundant system | | RETURN | Return from subroutine | | PWRITE | Write to protected memory? | | ... | | Similar to many early computers the CCS lacks multiply and divide instructions. It also likely lacks any innate support for non-integer numbers, decimal (such as floating point) calculations would need to be implemented in software, if needed at all. ### Possible Instructions On page 35 of "*Viking Spacecraft: Orbiter Design*"[^6] there is a table of "commands" for the CCS that look and awful lot like instructions. In the appendix glossary it lists `DC` as "discrete command", `CC` as "coded command", and `PC` as "processor command". I believe that "processor command" refers to an instruction. They also overlap with other inferred and known instructions, including `execute`, `store`, and `return`. # FCP Architecture For Voyager's mission, the spacecraft needed a maneuvering solution far more sophisticated than Viking's simple Attitude Control Subsystem. The [[#AACS|Attitude Articulation Control Subsystem]][^16] (AACS) takes over navigation duties in Voyager's design. The AACS operates semi-autonomously from the CCS and needs to be able to respond to changes in craft orientation (as the team discovered when using the Voyager's digital tape recorder created enough force to rotate the craft) to successfully fly by its targets and slingshot out of the solar system. The AACS's dedicated, fully reprogrammable,[^31] computer custom built for the task is called the Flight Control Processor (FCP). It started out as a [[#CCS Architecture|CCS]] and was modified to suit the increased demands of its role. It is faster (and more power hungry), with additional registers, and has specialized functionality for controlling the thrusters. Just like Voyager's primary computer and the Viking orbiters before it, the FCP comes in pairs: two processors, two memory banks, and two [[#HYBIC]]s. It uses 4096 18-bit wire-plated memory physically identical[^31] to the CCS's own [[#Memory]]. ## HYBIC > JPL’s Guidance and Control Section wanted to use a version of HYPACE as the computer for the Voyager. However, there was considerable pressure to build on the past and use existing equipment. > A study showed that the attitude control system could use the CCS computer, but the Flight Data System could not due to high I/O requirements. > Wayne Kohl, the Viking computer Cog Engineer, thought that the Voyager project could save $300,000 by using the Viking machine for the attitude control function. His division chief, John Scull, supported that idea, possibly because of budget pressure from NASA. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p177 (1988) Early on in the development of the Voyager program they wanted to use the experimental Hybrid Programmable Attitude Control Electronics (HYPACE) system, but this was considered economically infeasible. The Hybrid Buffer Interface Circuit (HYBIC) module is a result of a compromise, adding HYPACE-like features to the existing CCS processor. Maybe going with CCS+HYBIC meant that the probes weren't able to get as close to Jupiter or perform quite as intricate maneuvers as they could have with HYPACE, but on the other hand, perhaps that experimental system would not have held up as well half a century later. There is something to be said for having 4 near-identical computers on a spacecraft billions of miles from home. ### Index Registers The CCS design was extended with index registers[^14] to allow for indirect memory access. These registers would alter memory access by the amount they contained. While the exact number of index registers is not listed, it was likely three - one per axis. I see this as a something akin to MMX on the [[IA-32]] architecture. As there are several instructions only necessary for the primary computer, new instructions were likely swapped out rather than added, to retain the same 6-bit op code size. While these were added along with HYBIC, they may or may not be on the same board containing the HYBIC sub-assembly[^15] circuits. ### Buffer and Interface HYBIC's namesake is that of buffers and interfaces. It's primary job is to buffer I/O between the FCP and the driver circuits that control the axes. In this way I am reminded of the [[NMOS 6522]] which extends the [[6502]]'s input and output capabilities in much the same way. ## FCP Clock Speed > Guidance and Control grudgingly accepted the CCS computer on the condition it be speeded up. Requirements for active control during the kick stage burn meant that real-time control programs would have to be written to operate within a 20-millisecond cycle, roughly three times faster than the command computer. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p178 (1988) The section above is reproduced faithfully from the source document but has some seemingly conflicting information with itself and primary sources. Let's dig into these apparent issues. Firstly, it says "a 20-millisecond cycle" and that in order to reach it, it would need to be "three times faster" than the CCS. This sounds like it means a processor cycle, which we already know is 88 *micro*seconds[^7] not **milli**seconds. A three times increase would result in a processor cycle time somewhere around 30 microseconds. In a previous version of this note I speculated that "20 milliseconds" should be "20 microseconds" and that "roughly three times" should be "roughly four times". This would bring the numbers closer into alignment, as the 11 kHz[^10] Viking CCS processor would then become a 45 kHz Voyager FCP. But upon closer inspection there is something more subtle happening. The "cycle time" here is not the *processor* instruction cycle time, but the end-to-end **program** cycle time: that is how much time passes between when an input is received by the processor, makes its decisions, and finally sends out a command to the thrusters. This would mean that at the requested three-times speedup, around 680[^17] instructions could be processed by the FCP before it has to send a command to the ACS thrusters. > Guidance and Control asked for a 1-megahertz clock speed but wound up getting about three quarters of that. The attitude control engineers also added the index registers that proved so useful during the HYPACE experiment. > Documentation for the system still refers to the attitude control computer as HYPACE, even though its heart was the command computer. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p178 (1988) But the above section on the same page says that they requested a *1 MHz* clock speed and somehow got 750 khz. If the Viking CCS was operating at just 11 kHz[^10] then this would be a *massive* leap that would have serious consequences on the design considerations of the system. Not to discount the capabilities of TTL systems, 1 MHz and even 12 MHz (at least in the modern era) have certainly been reached with discrete TTL designs. One could speculate that they were running it at the lower speed during the Viking program just to reduce power. A kind [[#decle's Viking Orbiter CCS Video|reader]] contacted me to offer an alternative suggestion, that the *clock* speed is operating at a significant ($\sim 20 \times$) multiplier of the *cycle* rate: > Given the CCS is an 18-bit, bit serial machine, it would take at least 18 clocks to execute a single instruction. Therefore, the minimum clock speed of the Viking CCS would have been 200KHz ($11_{KHz} * 18_{bits}$), and probably higher when cycles for instruction fetch and decode are added. > A request for a 1MHz clock and 20usec instruction cycle time is consistent if there are 20 clocks per instruction giving a throughput of 50KIPS. Therefore, if the actual clock speed was 750KHz with 20 clocks per instruction the CPU would run at 37.5KIPS, with a cycle time of 26.7usec. > This would have been a multiplier of 3.3 over the Viking design. Whilst a reasonable improvement, I suspect it was doable (74S series TTL was introduced in 1969 and 74LS in 1971, both have gate delays of <20nsec). \- `decle`, in a message to me After reading this, I dug into the Viking Orbiter design documents again and discovered that I had overlooked the different timing signals.[^11] The reader's intuition about the Viking processor's clock speed was dead on! It is only mentioned in a single block diagram on page 159, but the processor timing signal is 250 kHz - very close to the reader's estimated 200 kHz! Indeed the resulting 750 kHz is $3 \times$ the original 250 kHz processor instruction timing. This implies that they probably switched from a 4 MHz to a 12 MHz primary oscillator to control the memory timings as well. # History ## Viking Program Viking 1 launched on August 20th, 1975 and Viking 2 launched 20 days later on September 9th, 1975. The Viking program successfully entered Mars orbit with two orbiters. Viking 1's orbiter survived for over 4 years (after running out of attitude control fuel) and Viking 2's orbiter lasted a little over a year (premature failure due to a fuel leak). ### Viking CCS The Viking program's processors operated with an 88 microsecond cycle time[^3][^7] meaning they were similar to a more common CPU running at around 11 kHz.[^10] The Viking CCS operated based on a 250kHz timing signal driven by a 4 MHz oscillator, all powered by 2.4 kHz AC supply.[^11][^28] It supported 32 general purpose inputs, though the Viking orbiters only used 24 of them. #### Purpose > The computer command subsystem was a special purpose digital computer designed to control the Viking orbiter. The CCS issued VO commands from any one of three sources. Commands were issued upon immediate request from the ground, from timed events loaded into memory, and in response to interrupts received from the spacecraft subsystems. \- Holmberg, Faust, Holt, "*Viking Spacecraft: Orbiter Design*"[^6] p158 (1980) In the Viking Orbiter, the CCS was the primary computer. Most other systems were relatively simple or even hard-wired, only able to execute commands given to them by the CCS. #### Redundancy > The Viking Orbiter Computer Command Subsystem was more sophisticated than the earlier systems in that it was a fully redundant subsystem with the capability of knowing what did happen as well as what should have happened. \- Project Viking Computer *Command Subsystem Document Collection* description[^2] > The CCS was configured as a block redundant computer. Each half of the subsystem was an independent special purpose computer containing a power supply, processor, memory, and output unit. All inputs were applied to both halves of the CCS, either half was capable of providing all mission requirements. > The utilization of a dual computer provided both redundancy and extended command capability. > The two processors operated asynchronously and were capable of being programmed to perform different functions simultaneously. \- Holmberg, Faust, Holt, "*Viking Spacecraft: Orbiter Design*"[^6] p158 (1980) The Viking CCS was small but mighty and fully redundant in single-failure scenarios. It wasn't only the processor that had a twin, but also the memory, power supply, and output unit came in pairs. Additionally, either processor could access either output unit. If one entire CCS completely failed, it had an identical twin capable of taking its place. #### Reprogrammability The Viking Orbiters had a relatively short missions life and the CCS was programmed once on the ground and not reprogrammed after launch. (cite this) > The construction and manufacture of the CCS was contracted out to General Electric, Aerospace Electronic Systems Department, Utica, New York. The construction and manufacture of the CCS Memory was contracted out to SCI Systems, Inc. (formerly Space Craft, Inc.) of Huntsville, Alabama. \- Project Viking Computer *Command Subsystem Document Collection* description page[^2] ### Software > The Viking Command Computer software structure appears different from others described in this volume because of the apparent lack of an operating system or executive program. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p161 (1988) > Viking Orbiter software had to be written in an assembler, which fortunately had relocatable addresses, simplifying the maintenance task. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p168 (1988) The 64-instruction processor isn't well suited to most higher level programming languages, including [[C]]. And its extremely limited [[#Memory]] means that every 18-bit word counts. The only real option was to code it directly in machine code or assembly. ### Personnel Neil A. Holmberg is the first author listed on the Viking '75 Spacecraft Design and Test Summary documents that have been so instrumental in my research. He also worked on the Lunar Orbiter II project[^33] a decade earlier. Robert P. Faust is the second listed author of the Viking summary documents. I haven't found any info on him at all. H. Milton Holt is third listed author of the Viking summary documents. He is also credited as the author of the mysterious [[#Unavailable Documents (Viking)|Viking CCS Requirements]] document cited by many early papers and books. Carl R. Pearson, primarily a chemical engineer for at least three decades[^32] at Langley Research Center, helped assemble[^6] the Viking Orbiter design summary documentation, including the CCS and FDS sections. ## Voyager Program Originally called Mariner 11 and Mariner 12, until after the cancellation of the unrelated [[#The Aborted Voyager Spacecraft and Lander|1960s Voyager Project]] when[^30] the Mariner Jupiter-Saturn (MJS) project adopted the Voyager name in its place. Voyager replaced the Thermoelectric Outer Planets Spacecraft (TOPS),[^27] although Voyager does utilize the same power source: a radio-isotope thermoelectric generator (RTG). Voyager *2* launched first, on August 20th, 1977; with Voyager **1** launching 16 days later on September 5th, 1977. Voyager 2, in addition to being launched first, is also the spacecraft which accomplished the "Grand Tour" of the solar system: capturing images of Jupiter, five of Jupiter's moon, Saturn, Uranus, and Neptune. Voyager 1 also visited Jupiter, Saturn, and some of their moons. After launch Saturn's moon Titan was selected for a closer flyby. The Voyager spacecraft are still out there[^25] and operating well into the [[2020s]]. The currently predicted end-of-life for their power source is [[2035]].[^26] ### Voyager CCS > Both Voyager spacecraft inherited command computers from the Viking project. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p203 (1988) > Voyager employs three dual-redundant computer systems per spacecraft. The first, the CCS, is nearly identical to that flown on Viking, performing sequencing and spacecraft health functions along with new ones necessitated by the addition of the other computers. > All command changes and memory loads for the other computers are routed through the CCS. This required the addition of the routine MEMLOAD. Another routine, AACSIN, was added to evaluate power codes sent from the Attitude Control computer as a "heartbeat" to inform the CCS of its health. \- James E. Tomayko, "*Computers in Spaceflight*"[^4] p174-175 (1988) Voyager's CCS was based on the earlier Viking CCS used for the Viking program's orbiters which launched in [[1975]]. Relatively little has been published about the Voyager CCS design differences compared to the original Viking CCS. Based on what is available though, it uses a different set of I/Os and swaps a few special purpose instructions formerly used for talking to specific Viking systems for tasks more relevant to Voyager. >[!NOTE] > Inexplicably, Wikipedia specifies in multiple locations that the CCS controls the cameras. This may be true, but it the CCS indirectly controls everything on the craft, not just the cameras. #### Reprogrammability The Voyager system has been patched innumerable times over it's nearly half-century life. This reprogrammability allows the CCS to work around more intricate scenarios, such as partial failure, where the two CCSes can cooperate to accomplish their goals when neither can complete it fully on their own. ### AACS The Attitude and Articulation Subsystem (AACS) controls the orbital flight path via attitude and maneuvering thrusters. It also triggered the initial deployment of equipment (such as the [[#RTG]] and scientific instruments).[^31] The AACS also contains the [[#FCP Architecture|Flight Control Processor]], which is another computer based on the [[#CCS Architecture]] that collects information from the orientation (gyro) and positioning instruments (including the celestial sensor), semi-autonomously processes this input, and sends commands to the thrusters.[^31] ### FDS > The Flight Data Subsystem (FDS) is also reprogrammable via appropriate CCS load commands. Its memory consists of redundant 16-bit x 8192-word CMOS units \- Adamski, "*Command and control of the Voyager spacecraft*" (1987)[^31] ### Three-In-One The Voyager program built not two but **three** spacecraft. The first called `VGR 77-1` was intended to be the "Test Proof Model" while `VGR 77-2` and `VRG 77-3` were intended to be the "Flight Models"[^18] - the ones that would actually be launched. During testing `VGR 77-2` demonstrated failures in its AACS[^20] and FDS. `VGR 77-1` was promoted to "Flight Model" in its place.[^19] `VGR 77-2` remained on earth as a test bed, however it was retired soon after launch - likely due to its inability to replicate the behavior of the spacecraft that launched. >[!QUESTION] > While I am fairly confident of my above reconstruction of the events, I am seeking additional first-party sources regarding which specific craft flew under which banner and the fate of the CDL test model. ### Software > The CCS uses assembly language and Voyager-unique pseudo code (interpreter). \- Matsumoto, "*Challenges of Flying a Very Old Spacecraft on a Very Long Mission*"[^8] p6 (2016) Based on later reports, it's unclear if there was actually a dedicated "assembler", there certainly wasn't one available in the [[2010s]] and [[2020s]] that anyone could use when things went wrong. The "interpreter" mentioned may be a [[Bytecode Interpreter]] or similar technique. [[Bytecode Interpreter]]s are favored for their ability to operate on memory-constrained and minimal instruction systems, acting as a kind of hyper-specific compression that also improves ergonomics for the programmers. #### Ground Control Software According to a 2016 FOIA request[^23] by Allan Lasser, the software used with Voyager 1 in 2016 was written under contract[^24] with JPL and Caltech, and Caltech retains the rights to the software. But this is likely just for the ground-control software, as there are internal specialists[^12] that develop the Voyager spacecrafts' on-board software. It has been widely reported that [[Fortran]] and [[C]] are used in the development of the Voyager Program's ground control software. I also stumbled across a manual[^22] for `MEMMAN` from 1990, an application which was written in [[Pascal]] and helped build memory layout images for the Voyager probes.[^21] ### Personnel Raymond L. Heacock joined the JPL in 1953 and was the Voyager Project Manager until 1981. In 1982 he took over as the acting manager for the main camera project of the of the Hubble Space Telescope and the following year became the manager of the Special Programs Office. He was appointed deputy assistant laboratory director of the Office of Space Science and Instruments in 1988[^34] where he remained until he retired in 1990 at the age of 62 after nearly four decades at JPL.[^35] # Resources ## Fellow Viking and Voyager Researchers I've had some correspondence with these fellow Viking/Voyager researchers. Their voices and perspectives are unique and useful to anyone interested in the topic. ### Alex Measday's Voyager and Fortran Site Check out (Charles) Alex Measday's page about [Voyager and Fortran 5](http://www.geonius.com/writing/other/voyager.html) (2024-2025) for a comprehensive refutation that [[Fortran]] was ever used to develop the software running on the Voyager probes. It also contains a wealth of other information on the topic. ### decle's Viking Orbiter CCS Video Check out `decle`'s video (2025) for a quick and easy to digest overview of the *Viking* CCS upon which the **Voyager** CCS & FCP is based:  Thanks `decle` for the additional insight on [[#FCP Clock Speed]]! ## Software - [Fortran Forum: A patch was sent to Voyager 2 yesterday](https://fortran-lang.discourse.group/t/a-patch-was-sent-to-voyager-2-yesterday/6670/15) (2023) - [Software Engineering StackExchange: Code development process for Voyager mission?](https://softwareengineering.stackexchange.com/questions/328608/code-development-process-for-voyager-mission) (2016) - [NASA FOIA on Muckrock: Voyager Command & Analysis Software Source Code](https://www.muckrock.com/foi/united-states-of-america-10/voyager-command-analysis-software-source-code-28641/) (2016) - [Ars Technica Forum: Humanity’s most distant space probe jeopardized by computer glitch](https://arstechnica.com/civis/threads/humanity%E2%80%99s-most-distant-space-probe-jeopardized-by-computer-glitch.1498717/page-4) (2024) - Gregory F. Welch, [MEMMAN Functional User's Guide](https://sreal.ucf.edu/wp-content/uploads/2025/03/Welch1990ac.pdf) (1990) - Documentation for a tool which manages Voyager probes' memory - This shows that some of the software which controls Voyager was written in [[Pascal]], at least at one time ## Further Reading These links and documents haven't been [[#References|cited]], but may contain images and other interesting information. - [The Brains of the Voyager Spacecraft: Command, Data, and Attitude Control Computers](https://www.allaboutcircuits.com/news/voyager-mission-anniversary-computers-command-data-attitude-control/) (2017) - Doesn't seem to contain any new information, appears to be a derivative of the Wired article below as well as some additional info from "*Computers in Spaceflight*" - [Wired Article: How Voyager's Vintage Tech Keeps Running](https://www.wired.com/2013/09/vintage-voyager-probes/) (2013) - Mainly interesting for a couple of old photos - [Dr. James E. Tomayko Collection of NASA Documents](https://specialcollections.wichita.edu/collections/ms/87-08/87-8-a.html) (1965-1979) (index) - [NASA JPL: Voyager 1 Fires Up Thrusters After 37 Years](https://www.jpl.nasa.gov/news/voyager-1-fires-up-thrusters-after-37-years) (2017) - [Vogons forum: Voyager probes 40th anniversary](https://www.vogons.org/viewtopic.php?t=55545&start=60) (2022) - [Electronic Engineering Journal: Voyagers 1 and 2 Take Embedded Computers into Interstellar Space](https://www.eejournal.com/article/voyagers-1-and-2-take-embedded-computers-into-interstellar-space/) (2022) - [The CPU Shack: The CPUs of Spacecraft Computers in Space](https://www.cpushack.com/space-craft-cpu.html) (2012) - [NASA: Voyager's 30-Year Plan](https://voyager.jpl.nasa.gov/mission/science/thirty-year-plan/) (2024) - Contains a lot of information about what instruments have been disabled and what other longevity strategies they have taken to preserve Voyager - [JPL Descanso: Voyager Telecommunications](https://descanso.jpl.nasa.gov/DPSummary/Descanso4--Voyager_new.pdf) (2002) (PDF) - [Scientific American: Record-Breaking Voyager Spacecraft Begin to Power Down](https://www.scientificamerican.com/article/record-breaking-voyager-spacecraft-begin-to-power-down/) (2022) - [Voyager Spacecraft Development Test Model](https://airandspace.si.edu/collection-objects/voyager-spacecraft-mock-full-scale/nasm_A19772728000) --- - Raymond L. Heacock "*The Voyager Spacecraft*" (1980) - Info on AACS, FCP, FDS but basically none on CCS - *Lots* of construction diagrams of the probes and internals - Heacock, R. L. "*Voyager at Saturn*" (1981-09-01) **conference paper** - Citation: https://ntrs.nasa.gov/citations/19810062997 - Citation: https://repository.exst.jaxa.jp/dspace/handle/a-is/415090 - Library: https://chipublib.on.worldcat.org/oclc/7332785015 - Republished in: L. G. Napolitano (editor) "*Space : mankind's fourth environment*" (1982) `ISBN 0080287085` `ISBN 9780080287089` `OCLC 1340072661` - Orbital diagrams, background history, instruments, no mention of computers, very similar citations as Heacock's other conference paper - "The MJS 77 Project name was changed to Voyager in March 1977 in order to provide the Project its own, separate identity." ### Unavailable Documents (Voyager) - design documentation ## Viking Program - [Viking Flight Data and CCS Chassis](https://www.flickr.com/photos/jurvetson/53840055839) (2024) (image gallery) - `V075 2001A6, 10047260-1 Rev-C, S/N-009, Flight Data Chassis, Subassembly` - `2009W6 Interconnect Assy., EA 6 F.D.S., Dwg. 10054996, S/N 004, Rev. H, V.O. 75` - `Non-Flight, V075 2001A2, 10047220-1A, S/N 004, CCS Chassis, Subassy` ### Unavailable Documents (Viking) - H. Milton Holt (JPL) "*Functional Requirement Viking Orbiter 1975 Flight Equipment Computer Command Subsystem Software*" `VO75-4-2005-2A` (1975-01-17) - JPL "*Viking 75 Orbiter Computer Command Subsystem Flight Software Design Description*" `3-228-234, A-134-13` (1973-11-20) - JPL "*CCS Functional Requirements*" (1975?) - Stephenson; R. Rhoads (JPL & CalTech) "*Advanced flight computers for planetary exploration*" (1988-01-01) `A89-38031 16-12` from 16th **International Symposium on Space Technology and Science** (ISTS) in Sapporo, Japan (1988-05-22 thru 1988-05-27) **conference paper** - Citation: https://ntrs.nasa.gov/citations/19890050802 - Citation: https://repository.exst.jaxa.jp/dspace/handle/a-is/363578 - Reprinted in: Kyohei Kondo (editor) "*Proceedings of the sixteenth International Symposium on Space Technology and Science, Sapporo, 1988*" `OCLC 19032154` - Library: https://search.worldcat.org/title/19032154 - Library: https://ci.nii.ac.jp/ncid/BA06757720?l=en - "Research concerning flight computers for use on interplanetary probes" ## The Aborted Voyager Spacecraft and Lander A decade before Voyager launched to survey the outer planets and travel to interstellar space, there was another project called Voyager intended to put a robotic lander on Venus or Mars. This project was canceled in 1971 amid NASA budget cuts and replaced with the less ambitious Viking Program. - [Voyager Spacecraft: Phase 1A Study Report](https://ntrs.nasa.gov/api/citations/19660011758/downloads/19660011758.pdf) (1965) (PDF) - [No Shortage of Dreams: The First Voyager 1967](https://spaceflighthistory.blogspot.com/2019/02/the-first-voyager-1967.html) (2019) Thanks to [[#Alex Measday's Voyager and Fortran Site|Alex Measday]] for the tip-off about this earlier project! # References [^1]: [Guinness World Records: Longest Period of Continual Operation for a Computer](https://www.guinnessworldrecords.com/world-records/635980-longest-period-of-continual-operation-for-a-computer) (2020) [^4]: [Computers in Spaceflight: The NASA Experience](https://ntrs.nasa.gov/citations/19880069935) (1988) `19880069935` `NASA-CR-182505` (PDF at link) - [Voyager - The flying computer center](https://web.archive.org/web/20230223062948/https://history.nasa.gov/computers/Ch6-2.html) (Chapter 6 of the above, archived) - [cleaned version of the book](https://github.com/01mf02/computers-spaceflight) (PDF at link) - [remaking of a 1988 NASA book](http://gedenkt.at/blog/computers-spaceflight/) (blog post about the making of the cleaned version) [^13]: K, Patel, W. Reinholtz, & W. Robinson, [High Speed Simulator - A Simulator for All Seasons](https://ntrs.nasa.gov/citations/20210003778) [^14]: https://en.wikipedia.org/wiki/Index_register [^18]: NASA JPL, [The Deep Space Network Progress Report 42-42](https://ntrs.nasa.gov/api/citations/19780016218/downloads/19780016218.pdf) p13-14 (1977) [^27]: [Thermoelectric Outer Planets Spacecraft (TOPS)](https://ntrs.nasa.gov/citations/19730012834) (1973) (PDF at link) [^28]: James Miller, Jay Leggett, Julie Kramer-White, [Design Development Test and Evaluation (DDT&E) Considerations for Safe and Reliable Human Rated Spacecraft Systems](https://core.ac.uk/download/pdf/10543737.pdf) p597 (2008-04) quoting B. Larman, "*Voyager Subsystem Interface Noise Problems*" (1995-03-21): > A related but not identical problem occurred on the CCS to the Attitude and Articulation Control Subsystem (AACS) Command Interface. In this case, waveform transition irregularities of the 2.4 kHz clock signal (again, variable with system load configuration) could, under certain conditions, result in trigger circuits interpreting these irregularities as clock pulses. ## Viking Spacecraft As the Voyager CCS is nearly identical to the Viking computer, Viking documents are very relevant to help understand its design. Especially as there are so few Voyager design documents available online. [^2]: [Project Viking Computer Command Subsystem Document Collection](https://researchworks.oclc.org/archivegrid/collection/data/733100113) (1969-1977) (index) **INDEX OFFLINE** but page still up - https://web.archive.org/web/20210913104132/https://drive.google.com/file/d/1TXcjorm_AmDHsqgsXg8-1e4m8PDBWwgp/view (non-functional) *Viking Project Collection*, 1967-1980 `JPL633` - https://drive.google.com/file/d/1IRbRag4yiBM0e5UvPHhytuDk85cLDWUq/view **working PDF** [^3]: [Viking Software Data](https://www.retrotechnology.com/memship/viking_software.txt) (1977) (TXT) - Quotes another document that says the clock cycle was 88 microseconds [^5]: Neil A. Holmberg, Robert P. Faust, H. Milton Holt, [Viking '75 Spacecraft Design and Test Summary Volume I - Lander Design](https://ntrs.nasa.gov/api/citations/19810001592/downloads/19810001592.pdf) (1980) (PDF) [^6]: [Viking '75 Spacecraft Design and Test Summary Volume II - Orbiter Design](https://ntrs.nasa.gov/api/citations/19810001593/downloads/19810001593.pdf) (1980) (PDF) ## Voyager Spacecraft There is a dearth of solid information on the Voyager available online. But it might be possible to request it by visiting the JPL's Data Systems, Wichita State University archives, or making another FOIA request. [^8]: Sun Kang Mastumoto, [Voyager Interstellar Mission: Challenges of Flying a Very Old Spacecraft on a Very Long Mission](https://arc.aiaa.org/doi/pdf/10.2514/6.2016-2415) (2016) (PDF) [^9]: [Voyager Computer Command Subsystem Document Collection](https://researchworks.oclc.org/archivegrid/collection/data/733100114) (1967-1977) (index) **INDEX OFFLINE** but page still up - https://web.archive.org/web/20210913232544/https://drive.google.com/file/d/1JWo7Nlgb3qWmOXHuIVhH5gmy_bnS7K6Z/view (non-functional) *Voyager Project Collection, 1966-1990* `JPL634` - https://drive.google.com/file/d/1JhDL-t9CQyatCYDq96BrOhddBrM_rdU2/view **working PDF** [^12]: [Popular Mechanics: Why NASA Needs a Programmer Fluent In 60-Year-Old Languages](https://www.popularmechanics.com/space/a17991/voyager-1-voyager-2-retiring-engineer/) [^15]: https://airandspace.si.edu/collection-objects/hybic-logic-subassembly-voyager-spacecraft/nasm_A19990061000 **image** [^16]: https://airandspace.si.edu/collection-objects/aacs-attitude-and-articulation-control-subsystem-bay-assembly-voyager/nasm_A19990066000 **image** [^21]: [Voyager Project Collection](https://researchworks.oclc.org/archivegrid/archiveComponent/733100114) (1966-1990) `JPL634` (index) (PDF at link) [^22]: [MEMMAN Functional User Manual](https://sreal.ucf.edu/wp-content/uploads/2025/03/Welch1990ac.pdf) (1990) [^23]: [NASA FOIA on Muckrock: Caltech/JPL Voyager Contract](https://www.muckrock.com/foi/united-states-of-america-10/caltechjpl-voyager-contract-28949/) (2016) [^24]: [Caltech/JPL Voyager Contract](https://cdn.muckrock.com/foia_files/2016/11/15/r_NNN12AA01C_Final.pdf) (PDF) (2012) [^25]: [NASA: Where are Voyager 1 and Voyager 2 Now?](https://science.nasa.gov/mission/voyager/where-are-voyager-1-and-voyager-2-now/) [^26]: [Inverse: NASA Explains How the Voyager Missions Could Live Until 2035](https://www.inverse.com/science/heres-how-nasa-plans-to-keep-voyager-1-2-running-until-2035) (2023) [^31]: Adamski, Terrance (JPL) "*Command and control of the Voyager spacecraft*" (1987) `AIAA-87-0501` from AIAA 87 - **AIAA 25th Aerospace Sciences Meeting** in Reno, Nevada (1987-01-12 thru 1987-01-15) **conference paper** - Contains a unique diagram of the high-level interlinks between the three computer systems ## Personnel This section will be empty for anyone viewing it on Publish, but for me it groups together citations on people that isn't super relevant to the rest of the research. Publish *helpfully* relocates all footnotes to the very bottom of the document. [^32]: https://www.dailypress.com/1991/02/20/auxiliarist-of-year-carl-pearson/ [^33]: https://ntrs.nasa.gov/api/citations/19770016195/downloads/19770016195.pdf [^34]: https://www.jpl.nasa.gov/news/deputy-assistant-laboratory-director-of-space-science-and-instrument-appointed/ [^35]: https://www.jpl.nasa.gov/news/schutz-appointed-deputy-assistant-director-of-office-of-space-science-and-instruments/ ## Footnotes [^7]: According to "*Computers in Spaceflight*"[^4] p159, "Average instruction cycle time came to 88 microseconds" [^10]: Based on the 88 microsecond cycle time. A 0.000088 second period = 11363.636363636 Hz. AKA ~11 kHz. [^11]: According to the Viking "*Orbiter Design*" document[^6] p123-124 there is a shared AC power source which helps keep system timings: > All science instruments and most engineering subsystems were powered by the 2.4-kHz inverter. ... Besides powering most of the VO subsystems, the frequency of the 2.4-kHz square wave was used to time V S/C events. On-Board stored commands were sequenced to be issues by the CCS with timing pulses generated by its clock. The clock derived its sync pulses from the 2.4-kHz square wave. And on p138 it mentions it in relation to the FDS master clock: > This inverted was the prime source electrical power ... It's output frequency served as the timing source for the CCS clock. A frequency signal at 4.8 kHz supplied by the FDS was used to synchronize the unit. Then on p158-160 it mentions a high-frequency oscillator as part of the system: > The clock derived timekeeping pulses for the CCS from the 2.4-kHz power input via the CCS power supply. The timing generator contained a 4-MHz oscillator and frequency countdown to the processor, memory, and output unit with the required clocking pulses. The processor clock, in conjuction with software routines, provided a time accounting system with resolution of 100 PPS, 1 PPS, and 1 PPH for the CCS. The timing generator consisted of a 4 $\pm$ 1 MHz oscillator and countdown chain. In Figure 105 on p159, the functional block diagram, it shows that the memory is using the 4-MHz timing and the processor is using a 250-kHz timing. [^17]: A $20_\mathsf{ms}$ end-to-end program cycle time gives us $20000_\mathsf{\mu s}$ to perform instructions in. The Viking CCS is sped up by three times, dividing the instruction cycle time by the same factor. $ \frac{20000_\mathsf{\mu s}}{88_\mathsf{\mu s} \div 3_\mathsf{speed}} \approx 681.818181826_\mathsf{instructions} $ [^19]: > ...they underwent rigorous prelaunch checks. When the second (VGR 77-2) revealed fatal flaws, it was left behind as a bed for spares and as a model on which engineers could test reported glitches. \- Stephen J. Pyne, "*Voyager: Exploration, Space, and the Third Great Age of Discovery*" p32 `978-0-670-02183-3` (2010) [^20]: > At the beginning of August 1977, several anomalies were discovered in the AACS and FDS of VGR 77-2. As one of three identical flight-qualified Voyager spacecraft, it was scheduled for the first launch. Instead, VGR 77-3 took over this role, while VGR 77-2, now repaired, later flew as Voyager 1. \- Olaf Bieler, "[Voyager 2 - die Reise beginnt](https://web.archive.org/web/20130328182727/https://www.raumfahrtkalender.de/thema-des-monats/august-1977)" (en: "*Voyager 2 - The Journey Begins*") (2013?) CC3.0 **machine translation by Google from German** This information is unsourced, so it's not really clear from where Bieler got the detail on which subsystems failed, but cross-referencing this with the *Voyager Project Collection*[^21] shows that the AACS and FDS systems are specifically mentioned as having failures (the former shows up often), making this claim quite plausible. On the other hand, the claim that VGR 77-2 was repaired feels speculative and specifically contradicts Pyne's account[^19] that it was scrapped for parts. Neither of these are primary sources and do not specifically cite their respective claims so it's hard to say which is correct on this point. Personally, I'm siding with Pyne on this one until better sources are available. [^29]: R. F. Draper, "*Mariner Jupiter / Saturn 1977 - Final Mission and System Design Review - Spacecraft Description*" p21 (1974-10-16) > COMPUTER COMMAND SUBSYSTEM > ... > 2 4096 WORD (18-BIT) PLATED WIRE MEMORIES [^30]: **Universe** "*Now Voyager, MJS Changes Its Name*" (1977-03-18) as quoted by a NASA internal magazine clips collection titled "*Voyager 1975-1977*" `CL#23-4309`: > Like the concentration it takes to remember the "New Year" on checks and correspondence, JPL employees currently are adjusting their thinking from MJS to "Voyager". > The name of the upcoming mission - with two spacecraft to be launched this coming August - has been officially changed from Mariner Jupiter/Saturn. > The mission, in the planning, preparation, design and assembly phases at the Lab for several years, has practically made MJS a household word. > On August 20, the first of two Voyager spacecraft will be launched from Cape Kennedy aboard a Titan-Centaur launch vehicle. The second launch is scheduled 12 days later.