The [MSC-51](https://en.wikipedia.org/wiki/Intel_8051) family [instruction set](https://en.wikipedia.org/wiki/Intel_8051?useskin=vector#Instruction_set) architecture (AKA `8051`) was originallly developed by Intel in the late 70s and released in 1980. # Notability Keith McMillen's [QuNexus](https://www.keithmcmillen.com/products/qunexus/) uses a chip based on the 8051 as its embedded processor which does MIDI, MPE, and sequencing. This variant has 64k of onboard storage. > It’s worth noting that the sequencer tracks are each monophonic, and while this is a limitation of the original QuNexus hardware design (there is only 64k of shared program/data memory in the 8051 microcontroller), we have found that this creative limitation is an interesting and fun take on MPE \- KMI CEO Eric Bateman via [PolyExpression Forum](https://community.polyexpression.com/t/qunexus-2-0-firmware-new-mpe-key-algorithm-and-three-track-step-sequencer-arpeggiator/995) ## Implementations # Instruction Set ## Complexity ## Features # History Intel ceased development of the 8051 in the 2000s (?) but many other companies still develop microcontrollers that are binary compatible with it. Wikipedia says it is an example of CISC Harvard architecture with RISC and Von Neumann. I don't really disagree. By my own estimation is a hybrid architecture taking ideas from many schools of thought but I would say that it is definitely a Harvard architecture and I don't consider the Von Neumann-like features notable and to be very cherry picked. - CISC-like: 16 addressing modes, variable width instructions. - RISC-like: 32 registers and banked registers so that there is less memory usage and transfer to the stack when switching subroutines. - Harvard-like: Program and data memory are fully independant and do not share the same memory access system. - Von Neumann-like: Uses a simple I/O bus for off-chip communication. # Footnotes # References