# PCB Traces 101 - Phil's Lab #112 https://youtu.be/xEVntmYLARw This video is a HUGE infodump/overview. Info overload I can basically use this as a map of all the areas and special topics in PCB design. See also from Phil's Lab: - 110 - Trace Delay Matching - 64, 3 - Critical Length, High Speed - 83 - Differential Pairs Resources: - https://github.com/pms67 - https://github.com/pms67/HadesFCS - Article on Controlled Impedance: https://www.protoexpress.com/blog/controlled-impedance-really-matters/ Tools: - Trace Width: https://www.advancedpcb.com/en-us/tools/trace-width-calculator/ - Trace Inductance: https://spok.ca/index.php/resources/tools/106-traceindcalc - Critical Length: https://www.protoexpress.com/tools/bandwidth-rise-time-and-critical-length-calculator/ --- ### Basics Tons of Parameters to consider: - Width, thickness, length, conductor material, dielectric material, etc. - Single-ended, differential, etc. - Trace geometry, trace to hole, distance to return path, internal vs. external layer traces, etc. - Power Delivery vs. Signal, Current levels, voltage levels, frequency content, propagation delay, design constraints, manufacturing constraints, etc. Performance Criteria: - Power integrity, Signal Integrity, Electromagnetic Compatibility, Manufacturability ``` Signal energy is not in the copper, but in the dielectric material between two copper conductors - instantaneous forward and return path - ??? - Energy is stored in a field in the dielectric between the traces apparently ``` ### Trace Geometry - Width - Typical widths: 0.1 to 1.0mm - Depends on application - Thickness - Outer Layers: 1oz = 35um - Inner Layers: 1/2oz = 17.5um - Depends on - Current Carrying Capability - Minimum trace widths - thicker copper -> higher costs - Lengths - Keep as short as possible for both power and signal - Longer traces have more EMI potential - emission, susceptibility, - crosstalk on long parallel runs - Other Parameters - Surface Finish - Copper is not raw exposed, usually plated - Influences shelf life, solderability, RF performance - Inner vs. Outer Layer - affects thermals, shielding, controlled impedances - Dielectric - Thickness of dielectric, - Spacing to reference planes - Controlled Impedance - Field Spread - Dielectric Constants - Dissipation Factors ![[Pasted image 20241217124120.png]] ### PCB Specs - FR-4 vs. Rogers - Base Board Material - TG130-140 vs TG150-160 - Glass Transition Temperatures - Copper thickness, layer count, etc. ### Electrical Properties - Resistance - `R=p*L/A` - Long narrow traces -> voltage drops, heating, poor ampacity - Inductance - Difficult to compute, approximations for external layers are crazy - Generally depends on "loop area" - distance through dielectric to return path - Increasing dielectric depth increases inductance. Keep it low, flat - Capacitance - `C=p*A/d` - Decreasing dielectric depth increases capacitance and decreases inductance ![[Pasted image 20241217160704.png]] ![[Pasted image 20241217160651.png]] ### Power Delivery - **Power distribution network is critical in many designs** - Traces and Planes, sized appropriately from both DC and AC standpoints - Current Handling Capabilities - IPC-2221 - Set trace width and copper weight, find Ω/mm and Ampacity - These online calculators will produce different results for internal vs. external layers - The same current capacity might be 0.781mm vs. 0.300mm for in/out - Play with the calculator to develop intuition - Inductance - High L means it's hard to get the current you need at high frequencies. - Example: - 0.3mm width, 1oz copper, 0.21mm dielectric = 0.95nH/mm - There are trace inductance calculators as well. - Typical Power Distribution Network Model. Note the Trace Inductance - Loop Area - Increasing Trace width DECREASES Inductance. - Longer Trace Length and Thicker dielectric INCREASES Inductance. - We want WIDE and SHORT traces over THIN dielectrics ![[Pasted image 20241217161216.png]] ### Differential Pairs - **SEE VIDEO #83** ### Controlled Impedance - Need to know about it - For High Speed Digital and High Frequency Analog (RF) - **Critical Length** - There are many definitions for what qualifies as "high speed" - It's when the trace length vs. wavelength at that frequency is nontrivial - Input - Dielectric Constant (Er) - Maximum Data Transfer Rate (DTR in Gbps) - Fastest SIgnal Rise Time (tr in ns) - Maximum Frequency Content (Fmax in GHz) - 3dB Bandwidth (BW in GHz) - Output - Wavelength (gamma in nm) - Critical Length (L_c in mm) - Maximum Short Length (L_max in mm) - For a given signal trace, say Critical Length is 12. Once it's 12mm or above, we need to actively control the trace impedance - **SEE VIDEO #64** - Controlled impedance is for matching trace impedance to driver and load impedance - Maximum power transmission at equal impedances. - Otherwise you get reflections, which degrade signal integrity and degrade EMI performance - **SEE VIDEO #3** - Other types of traces (no idea what these are) - Microstrip - External Layer Trace - Stripline - Internal Layer Trace - Co-Planar - Embedded - Symmetric - Asymmetric ### Trace Delays & Delay Matching - The meandering squiggles - To ensure matching delays and ensure correct timing within some margin - Signals Propagate at different speeds depending on - Dielectric Material - Trace Geometry - Loading - Inner and Outer layer traces will propagate at different speeds because the dielectric environment around them is different - e.g. - Tpd outer = 6.1ps/mm vs. Tpd inner = 6.7ps/mm - **SEE VIDEO #110** ### Practical Guidelines - Size traces appropriately for application (Signal, power) - Stay away from manufacturing minimums! it's harder and more expensive - Consider all aspects: - DC Loss - Thermals - Inductance - Signal Bandwidth - Controlled Impedance - Skin Effect - Materials - Typical Widths - 0.2-0.3mm for signals - 0.5-1.0mm for power - Minimize lengths - Avoid long parallel runs - Low Speed traces can be long - High Speed traces need to be short, as short as possible. - Current Capability - Increase width before thickness/copper weight - saves money - Thicker copper means wider spacing as well - Spacing - IPC Guidelines: 1H for stripline, 2H for microstrip - 1H = Dielectric Thickness - Special considerations for HV boards - Not just trace-to-trace - Also consider - trace-to-copper - trace-to-hole - trace-to-board-edge - etc. - If you have the space, use it. Keep them far apart if you can. - Maintain a proper return path at all times - No gaps in ground plane underneath - Closely spaced - thin dielectric - Return path below is wider than trace (~3H wide area on ground plane) - Fields spread out on the backside - Note the important differences between inner and outer layer traces