## _Course Content_ _(Advanced Digital Hardware Design)_ **Lesson 1: Introduction** Welcome to the course! This session will give you an overview and what you will learn in this course. - **Course Overview** - **Course Hardware (ZettBrett)** - **Choice of ECAD Tool** - **Target Audience & Pre-Requisites** - **Course Materials & Certificate** _Lesson length: 00:14:49_ **Lesson 2: System-Level Design** Before digging deep into a new hardware project (including schematics and PCB), we need to approach the design from a high level. Looking at specifications and requirements, constraints, and from those choosing our main building blocks, components, and peripherals. - **Why use FPGAs/SoCs? Why not?** - **Complexity & Cost** - **Manufacturers & Tools** - **System Specifications & Requirements** - **Reference Designs & System-on-Modules** - **ZettBrett Block Diagram** - **Part Selection: FPGA/SoC, Configuration Memory, DDR3 Memory, Programming, Peripherals, Power, Additional Components** _Lesson length: 00:51:33_ **Lesson 3: Schematic Fundamentals** Schematics need to be designed as much as the circuitry and the PCB. This lesson will teach you the fundamentals of how to create clean, user-friendly, and future-proof schematics and schematic symbols. - **Sectioning and Flow** - **Power Flags** - **Crossings & Junctions** - **Titles, Texts, Calculations, Title Blocks** - **Schematic Symbols & Creation Example (with Datasheet)** - **Net Labelling** - **BoM Consolidation** - **Annotation** - **Colours** _Lesson length: 00:24:20_ **Lesson 4: PCB Design Fundamentals** Modern, high-speed PCB designs need to strictly follow a set of guidelines. This is with regards to overall function, signal integrity (SI) and electromagnetic interference (EMI) performance, as well as taking into account the manufacturing and assembly process. This lesson highlights the core methods to creating well-designed PCBs, while providing practical examples throughout. - **Fields, Energy, Return Paths** - **Grounding, Sectioning, Crosstalk** - **Via Sizing & Traces (Single-Ended, Differential)** - **Transfer Vias** - **BGA Design Basics & Fan-Out** - **Delay Tuning and Matching** - **Incorporating Package Delays** - **Design for Manufacturing (DFM) Guidelines** - **Manufacturer Capabilities & Design Rules** - **Footprint Design (with Datasheet)** - **Double-Sided Assembly Guidelines** _Lesson length: 01:27:10_ **Lesson 5: Build-Up, Stack-Up, and Controlled Impedance** Good build-up and stack-up design are essential for a functional, high-speed PCB for best-possible SI and EMI performance. Modern ICs with fast edge-rates and high-speed signalling additionally require tuned, impedance-controlled traces. This lesson will teach you guidelines, and show you how to design your own build-ups, stack-ups, and how to calculate and route controlled impedance traces for various high-speed interfaces. - **Build-Up Basics and Design** - **Stack-Up Basics** - **Stack-Up Design Rules for SI and EMI** - **Impedance Matching** - **Critical Length (Analogue, Digital)** - **Rise/Fall Times vs Critical Length** - **Finding Rise/Fall Times** - **Controlled Impedance Basics** - **Microstrip Traces** - **Stripline Traces** - **Controlled Impedance Differential Pairs** - **Power Planes as References** - **Manufacturers & Impedance Control** _Lesson length: 01:24:12_ **Lesson 6: Power** For high-speed, digital PCBs, not only are signals critical to good performance but also the entire power distribution network (PDN). From the many high-current rails needing to be generated by switching regulators, to how this power is delivered to fast-switching ICs via various non-ideal interconnects, and decoupled with non-ideal capacitors. This lesson will explore the elements of PDN design, showing techniques and guidelines, real-world examples, and simulations along the way. - **Power Distribution Network (PDN) Basics** Elements (VRMs, Traces, Vias, Planes, Caps, ...), target impedance, non-idealities, thermals, sectioning, ... - **PDN Design & Sizing** Voltage sources, number of voltage rails (FPGA/SoC/peripherals), current/power requirements & estimation, power supply sequencing, ... - **Switching Regulators** Choice, sizing, noise considerations, layout & routing, ... - **PDN Protection** ESD, eFuses: choice & key parameters, implementation, ... - **Traces** Non-idealities (resistance, inductance), trace sizing, IPC-2221 calculations, ... - **Vias** Via sizing, spacing for low inductance, low-inductance capacitor attachments, ... - **Power Planes** Benefits, delivery for multiple voltage rails, perforations, necking, ... - **Capacitors** Class 2 MLCC basics, derating (bias, temperature, ...), non-idealities, non-ideal impedance vs frequency, self-resonance, finding non-ideal parameters, choice guidelines, electrolytics, ... - **Simulation** SPICE simulation of simple PDN (VRM, traces, caps, load), DC analysis, transient simulation, frequency response, ringing & resonances, ... - **Decoupling** Choice of PDN for FPGAs/SoCs (type, size, value of capacitors per rail), capacitor placement & layout & routing (QFP, QFN, BGA), ... - **PDN Analyser Tool** Example PCB DC analysis (voltage drop, current density) (_Altium only_) _Lesson length: 01:52:50_ **Lesson 7: FPGA/SoC Config & I/O** The course demo hardware (_ZettBrett_) uses an AMD/Xilinx Zynq-7000 series SoC (System-on-Chip). To even be able to boot-up a complex device such as this, we need to add a fair amount of external circuitry. This lesson will show you how the specific part was chosen, how to design the SoC's fundamental schematic and all of its supporting circuitry, assign pinouts, and more. - **Part Selection** Distributor part search, manufacturer product selection guides, datasheets, ... - **JTAG** Pinout, USB-to-JTAG/USB-to-UART circuitry, ... - **Configuration** Strapping options, config. pins, boot modes, configuration memory, clocking, ... - **Programmable Logic (PL)** SoC FPGA section set-up, pin descriptions, bank voltages, clocking, layout/routing, ... - **Processing System (PS)** Bank divisions, bank voltages, reset signals, clocking, pin-out, ... _Lesson length: 00:51:13_ **Lesson 8: DDR3 Memory & Termination** High-speed DDR interfaces can be one of the most challenging sections to design, layout, and route on a modern PCB. This lesson will cover essential signal termination techniques, as well as DDR3 memory basics, schematic design, and layout/routing techniques to guide you through the entire process of adding high-speed memory to your design. - **Termination** Basics, reflection vs load impedance, parallel termination, series termination ('reflection mode switching'), VTT termination, part selection (resistors, VTT regulator), ... - **DDR3 Memory** DDR basics, signals (CLK, ACC, DQ) & power, SoC pin-out, memory module selection, bit & byte-lane swapping, single module vs multiple modules, fly-by connection, layout & routing, power delivery & decoupling, controlled impedance, delay matching, diff. pair skew matching, ... _Lesson length: 01:39:47_ **Lesson 9: Gigabit Ethernet** Implementing a Gigabit Ethernet interface in your system is not trivial. This lesson will start from the basics, show you how to choose and connect required parts and interfaces, as well as show you how to layout and route this high-speed system. - **Ethernet Hardware Basics** Media-Independent Interface (MII), physical layers (PHYs), magnetics, RJ45 connectors, ... - **Physical Layer (PHY)** Parameters, RGMII/MDIO/MDI interface, power supplies, registers, misc. signals (clock, LED, strapping options, ...), part choice, SoC interface and pin-out, schematic design, ... - **RJ45 Connector** Parameters, part selection, external vs integrated magnetics, ... - **Layout and Routing** RJ45 connector placement considerations, PHY placement, QFN fan-out and power delivery, RGMII/MDIO/MDI diff. pair routing, controlled impedance, delay matching, series termination, chassis connection, ... _Lesson length: 00:57:36_ **Lesson 10: USB 2.0 HS & eMMC Memory** This lesson will show how to add a USB 2.0 high-speed on-the-go (HS, OTG) interface and large amounts of non-volatile memory (eMMC) to your design. We'll see what interfaces (ULPI, SDIO) and additional components (PHYs) we require, as well as how to layout and route these devices. Finally, we'll look at some techniques of how to fan-out a 0.5mm-pitch BGA! - **USB 2.0 HS Basics** ULPI interface, physical layer (PHY), part choice (PHY, connector), datasheets, ... - **USB 2.0 HS Implementation** SoC pinout, PHY/load switch/connector schematic, PCB layout and routing (QFN, ULPI, USB HS diff. pair, controlled impedance, delay matching), ... - **eMMC Memory Basics** SDIO interface, part choice, datasheets, ... - **eMMC Memory Implementation** Schematic, SoC pinout, PCB layout and routing (SDIO, controlled impedance, delay matching), techniques for 0.5mm-pitch BGAs, ... _Lesson length: 00:43:59_ **Lesson 11: Final Touches & Manufacturing** PCB design does not end directly after layout and routing. We need to add various 'final touches' and then generate all necessary files and documentation for manufacturing and assembly. This lesson shows you how to do that! - **Final Touches** Removing unused pad shapes, teardrops, copper pours & stitching vias, edge stitching (to combat edge-fired emissions), testpoints, fiducials, layer indexing, silkscreen, ... - **Manufacturing** Gerber file generation and checking, manufacturing drawing (build-up, impedance control requirements, ...), ... - **Assembly** Generation of Bill of Materials (BoM), pick 'n' place (CPL) file, and assembly drawings, ... - **Ordering Process** Getting a quote, adding design information & requirements, cost, lead time, ... _Lesson length: 00:46:37_ **Lesson 12: Outro** Congratulations on completing the course! This outro section will show you further, free resources for hardware design, and how to get in touch with the instructor. Make sure to hand in your course submission in this lesson (requirements outlined in _Lesson 1_)! _Lesson length: 00:02:38_