# JTAG (Joint Test Action Group) **Table of Contents** # About - Traditional Connection for debug for ARM 7/9 family - Needs 4 pins minimum # References - EEVblog #499 - What is JTAG and Boundary Scan? [](https://www.youtube.com/watch?v=TlWlLeC5BUs) - https://www.corelis.com/education/tutorials/jtag-tutorial/what-is-jtag/ - https://www.reddit.com/r/embedded/comments/x9461f/learning_to_get_the_full_use_of_jtag/ - https://www.xjtag.com/about-jtag/what-is-jtag/ - https://www.jtag.com/ - https://www.xjtag.com/about-jtag/jtag-a-technical-overview/ - https://www.allaboutcircuits.com/technical-articles/introduction-to-jtag-test-access-port-tap/ - https://digilent.com/shop/fpga-boards/programmers/?srsltid=AfmBOorCLSFXmAjyaryBZcczgflfPzPOMZ_gw2r4etvK6CyT2OLA1X0h