# Level and Edge-Triggering **The two main types of sensitivities of circuits or components to a gating signal.** ![[LevelVSEdgeTriggeredTiming.svg]] *Timing diagram a clock signal, input, and output of a level and an edge-triggered device* > [!Example] Level-triggered > A *level-triggered* or *level sensitive* circuit or component changes its output according to the input signal, as long as a gating signal, such as a clock signal, is on. ^fbbdd2 > [!Example] Edge-triggered > A *edge-triggered* or *edge sensitive* circuit or component changes its output according to the input signal only during a transition of the gating signal, typically a clock signal. > > Edge-triggered circuits or components are either *negative* or *positive-edge* triggered, depending on if their output changes during a *falling* or *rising* transition ^8b1bab